Part Number Hot Search : 
90005 M2049TNA MUR1660 MA3X151D DM74S240 54FCT W83178S 1H221
Product Description
Full Text Search
 

To Download ICS844051I Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 PRELIMINARY
Integrated Circuit Systems, Inc.
ICS844051I
FEMTOCLOCKSTM CRYSTAL-TO- LVDS CLOCK GENERATOR
FEATURES
* One Differential LVDS output * Crystal oscillator interface designed for 18pF parallel resonant crystals (18.125MHz - 23.4375MHz) * Output frequency range: 145MHz - 187.5MHz and 72.5MHz - 93.75MHz * VCO range: 580MHz - 750MHz * RMS phase jitter @156.25MHz (1.875MHz - 20MHz): 0.45ps (typical) * 3.3V or 2.5V operating supply * -40C to 85C ambient operating temperature * Available in both standard and lead-free RoHS-compliant packages
GENERAL DESCRIPTION
The ICS844051I is a Gigabit Ethernet Clock Generator and a member of the HiPerClocksTM HiPerClockSTM family of high performance devices from ICS. The ICS844051I can synthesize 10 Gigabit Ethernet, SONET, or Serial ATA reference clock frequencies with the appropriate choice of crystal and output divider. The ICS844051I has excellent phase jitter performance and is packaged in a small 8-pin TSSOP, making it ideal for use in systems with limited board space.
IC S
FREQUENCY TABLE
Inputs Crystal Frequency (MHz) 20.141601 20.141601 19.53125 19.53125 19.44 19.44 18.75 18.75 FREQ_SEL 0 1 0 1 0 1 0 1 Output Frequency (MHz) 161.132812 80.566406 156.25 78.125 155.52 77.76 15 0 75
BLOCK DIAGRAM
FREQ_SEL XTAL_IN
Pulldown
PIN ASSIGNMENT
0 /4 (default) 1 /8
VDDA GND XTAL_OUT XTAL_IN 1 2 3 4 8 7 6 5 VDD Q nQ FREQ_SEL
OSC
XTAL_OUT
Phase Detector
VCO
Q nQ
/32 (fixed)
ICS844051I
8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. 844051CGI www.icst.com/products/hiperclocks.html REV. A NOVEMBER 23, 2005
1
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS844051I FEMTOCLOCKSTM CRYSTAL-TO- LVDS CLOCK GENERATOR
TABLE 1. PIN DESCRIPTIONS
Number 1 2 3, 4 5 6, 7 8 Name VDDA GND XTAL_OUT, XTAL_IN FREQ_SEL nQ, Q VDD Power Power Input Input Output Power Pullup Type Description Analog supply pin. Power supply ground. Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output. Frequency select pin. Differential clock outputs. LVDS interface levels. Power supply pin.
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol CIN RPULLUP Parameter Input Capacitance Input Pullup Resistor Test Conditions Minimum Typical 4 51 Maximum Units pF k
844051CGI
www.icst.com/products/hiperclocks.html
2
REV. A NOVEMBER 23, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS844051I
FEMTOCLOCKSTM CRYSTAL-TO- LVDS CLOCK GENERATOR
4.6V -0.5V to VDD + 0.5 V 10mA 15mA 101.7C/W (0 mps) -65C to 150C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD Inputs, VI Outputs, IO (LVDS) Continuous Current Surge Current Package Thermal Impedance, JA Storage Temperature, TSTG
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 3.3V5%, TA = -40C TO 85C
Symbol VDD VDDA IDD IDDA Parameter Power Supply Voltage Analog Supply Voltage Power Supply Current Analog Supply Current Test Conditions Minimum 3.135 3.135 Typical 3.3 3.3 100 8 Maximum 3.465 3.465 Units V V mA mA
TABLE 3B. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 2.5V5%, TA = -40C TO 85C
Symbol VDD VDDA IDD IDDA Parameter Power Supply Voltage Analog Supply Voltage Power Supply Current Analog Supply Current Test Conditions Minimum 2.375 2.375 Typical 2.5 2.5 95 8 Maximum 2.625 2.625 Units V V mA mA
TABLE 3C. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDA = 3.3V5% OR 2.5V5%, TA = -40C TO 85C
Symbol VIH VIL IIH IIL Parameter Input High Voltage Input Low Voltage Input High Current Input Low Current Test Conditions VDD = 3.3V VDD = 2.5 VDD = 3.3V VDD = 2.5 VDD = VIN = 3.465V or 2.625V VDD = 3.465V or 2.625V, VIN = 0V -150 Minimum 2 1.7 -0.3 -0.3 Typical Maximum VDD + 0.3 VDD + 0.3 0.8 0.7 5 Units V V V V A A
844051CGI
www.icst.com/products/hiperclocks.html
3
REV. A NOVEMBER 23, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS844051I FEMTOCLOCKSTM CRYSTAL-TO- LVDS CLOCK GENERATOR
Minimum Typical 350 400 1.4 50 Maximum Units mV mV V mV
TABLE 3D. LVDS DC CHARACTERISTICS, VDD = VDDA = 3.3V5%, TA = -40C TO 85C
Symbol VOD VOD VOS VOS Parameter Differential Output Voltage VOD Magnitude Change Offset Voltage VOS Magnitude Change Test Conditions
TABLE 3E. LVDS DC CHARACTERISTICS, VDD = VDDA = 2.5V5%, TA = -40C TO 85C
Symbol VOD VOD VOS VOS Parameter Differential Output Voltage VOD Magnitude Change Offset Voltage VOS Magnitude Change Test Conditions Minimum Typical 350 400 1.15 40 Maximum Units mV mV V mV
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter Mode of Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitance Drive Level 18.125 Test Conditions Minimum Typical Fundamental 23.4375 50 7 1 MHz pF mW Maximum Units
TABLE 5A. AC CHARACTERISTICS, VDD = VDDA = 3.3V5%, TA = -40C TO 85C
Symbol fOUT t jit(O) t R / tF Parameter Output Frequency RMS Phase Jitter ( Random); NOTE 1 Output Rise/Fall Time Test Conditions 156.25MHz @ Integration Range: 1.875MHz - 20MHz 20% to 80% Minimum Typical 156.25 0.45 300 50 Maximum Units MHz ps ps %
odc Output Duty Cycle NOTE 1: Please refer to the Phase Noise Plots following this section.
TABLE 5B. AC CHARACTERISTICS, VDD = VDDA = 2.5V5%, TA = -40C TO 85C
Symbol fOUT t jit(O) t R / tF Parameter Output Frequency RMS Phase Jitter ( Random); NOTE 1 Output Rise/Fall Time Test Conditions 156.25MHz @ Integration Range: 1.875MHz - 20MHz 20% to 80% Minimum Typical 156.25 0.45 300 50 Maximum Units MHz ps ps %
odc Output Duty Cycle NOTE 1: Please refer to the Phase Noise Plots following this section.
844051CGI
www.icst.com/products/hiperclocks.html
4
REV. A NOVEMBER 23, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS844051I
FEMTOCLOCKSTM CRYSTAL-TO- LVDS CLOCK GENERATOR
AT
TYPICAL PHASE NOISE
0 -10 -20 -30 -40 -50
156.25MHZ @ 3.3V
Gb Ethernet Filter 156.25MHz
NOISE POWER dBc Hz
-60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 100 1k 10k
RMS Phase Jitter (Random) 1.875MHz to 20MHz = 0.45ps (typical)
Raw Phase Noise Data
TYPICAL PHASE NOISE
0 -10 -20 -30 -40 -50
Phase Noise Result by adding Gb Ethernet Filter to raw data
100k 1M 10M 100M
OFFSET FREQUENCY (HZ)
AT
156.25MHZ @ 2.5V
Gb Ethernet Filter 156.25MHz
NOISE POWER dBc Hz
-60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -180 -190 100 1k 10k -170
RMS Phase Jitter (Random) 1.875MHz to 20MHz = 0.45ps (typical)
Raw Phase Noise Data
844051CGI
www.icst.com/products/hiperclocks.html
5
Phase Noise Result by adding Gb Ethernet Filter to raw data
100k 1M 10M 100M
REV. A NOVEMBER 23, 2005
OFFSET FREQUENCY (HZ)
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS844051I FEMTOCLOCKSTM CRYSTAL-TO- LVDS CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
SCOPE
Qx
Qx
2.5V5% POWER SUPPLY
SCOPE
Power Supply +
Float GND
-
LVDS
nQx
+ Float GND -
LVDS
nQx
LVDS 3.3V OUTPUT LOAD AC TEST CIRCUIT
Phase Noise Plot
LVDS 2.5V OUTPUT LOAD AC TEST CIRCUIT
nQ
Noise Power
Q
t PW
Phase Noise Mask
t
PERIOD
odc =
f1 Offset Frequency f2
t PW t PERIOD
x 100%
RMS Jitter = Area Under the Masked Phase Noise Plot
RMS PHASE JITTER
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
VDD VDD
out
80% Clock Outputs
80% VSW I N G
DC Input
LVDS
out
20% tR tF
20%
VOS/ VOS
OUTPUT RISE/FALL TIME
VDD VDD
out
OFFSET VOLTAGE SETUP
DC Input
LVDS
100
VOD/ VOD out
DIFFERENTIAL OUTPUT VOLTAGE SETUP
844051CGI
www.icst.com/products/hiperclocks.html
6
REV. A NOVEMBER 23, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS844051I
FEMTOCLOCKSTM CRYSTAL-TO- LVDS CLOCK GENERATOR APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS844051I provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. VDD and VDDA should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10 resistor along with a 10F and a .01F bypass capacitor should be connected to each VDDA pin. The 10 resistor can also be replaced by a ferrite bead.
3.3V or 2.5V VDD .01F V DDA .01F 10F 10
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS844051I has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 2 below were determined using a 25MHz, 18pF parallel resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts.
XTAL_IN C1 X1 Crystal XTAL_OUT C2
Figure 2. CRYSTAL INPUt INTERFACE
844051CGI
www.icst.com/products/hiperclocks.html
7
REV. A NOVEMBER 23, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS844051I FEMTOCLOCKSTM CRYSTAL-TO- LVDS CLOCK GENERATOR
3.3V, 2.5V LVDS DRIVER TERMINATION
A general LVDS interface is shown in Figure 3. In a 100 differential transmission line environment, LVDS drivers require a matched load termination of 100 across near the receiver input. For a multiple LVDS outputs buffer, if only partial outputs are used, it is recommended to terminate the un-used outputs.
2.5V or 3.3V VDD LVDS_Driv er + R1 100
-
100 Ohm Differential Transmission Line
FIGURE 3. TYPICAL LVDS DRIVER TERMINATION
844051CGI
www.icst.com/products/hiperclocks.html
8
REV. A NOVEMBER 23, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS844051I
FEMTOCLOCKSTM CRYSTAL-TO- LVDS CLOCK GENERATOR RELIABILITY INFORMATION
TABLE 6.
JAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP
JA by Velocity (Meters per Second)
0 1
90.5C/W
2.5
89.8C/W
Multi-Layer PCB, JEDEC Standard Test Boards
101.7C/W
TRANSISTOR COUNT
The transistor count for ICS844051I is: 2395
844051CGI
www.icst.com/products/hiperclocks.html
9
REV. A NOVEMBER 23, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS844051I FEMTOCLOCKSTM CRYSTAL-TO- LVDS CLOCK GENERATOR
PACKAGE OUTLINE - G SUFFIX
FOR
8 LEAD TSSOP
TABLE 7. PACKAGE DIMENSIONS
SYMBOL N A A1 A2 b c D E E1 e L aaa 0.45 0 -4.30 0.65 BASIC 0.75 8 0.10 -0.05 0.80 0.19 0.09 2.90 6.40 BASIC 4.50 Millimeters Minimum 8 1.20 0.15 1.05 0.30 0.20 3.10 Maximum
Reference Document: JEDEC Publication 95, MO-153
844051CGI
www.icst.com/products/hiperclocks.html
10
REV. A NOVEMBER 23, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS844051I
FEMTOCLOCKSTM CRYSTAL-TO- LVDS CLOCK GENERATOR
Marking 451CI 451CI TBD TBD Package 8 Lead TSSOP 8 Lead TSSOP 8 Lead "Lead-Free" TSSOP 8 Lead "Lead-Free" TSSOP Shipping Packaging tube 2500 tape & reel tube 2500 tape & reel Temperature -40C to 85C -40C to 85C -40C to 85C -40C to 85C
TABLE 8. ORDERING INFORMATION
Part/Order Number ICS844051CGI ICS844051CGIT ICS844051CGILF ICS844051CGILFT
NOTE: Par ts thar are ordered with an "LF" suffix to the par t number are the Pb-Free configuraiton and are RoHS compliant.
The aforementioned trademarks, HiPerClockS and FemtoClocks are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 844051CGI
www.icst.com/products/hiperclocks.html
11
REV. A NOVEMBER 23, 2005


▲Up To Search▲   

 
Price & Availability of ICS844051I

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X